Build a complete AXI4 bus master in VHDL, prove it correct with VUnit’s AXI slave models, then benchmark block RAM against DDR3 on an Arty board and see why AXI4 has bursts.

What you'll get:

• Permanent access to 12 lessons
  (2 hours and 33 minutes of video)
• Downloadable VHDL code, diagrams, and the exported Vivado project and block design

All purchases made with the same email address share one VHDLwhiz account, created automatically on your first purchase.

This is a one-time payment. No subscription, no hidden fees. Because you get immediate access to the course, the purchase is non-refundable.

This course is also available through the separate VHDLwhiz Membership subscription.

Questions before buying, or need help with your purchase? Email jonas@vhdlwhiz.com